Power Dissipation of Analog-to-Digital Converters

The power dissipation of an analog-to-digital converter (ADC) is a function of many variables, such as sampling rate (f S), resolution, architecture, process, voltage supply and technology. This chapter will attempt to establish the power dependence on sampling rate and resolution as its primary goal. To make this tenable, the scope of this task will be narrowed in the following two ways: 1. Architectures: Only those ADC's suitable for use in high-speed signal processing considered. 2. Process: Coverage will be restricted to high-integration capable IC processes such as bipolar, BiCMOS and CMOS processes which allow embedding of the ADC function in a monolithic signal processing chip. Even with a narrower scope, only a first-order analysis is attempted in light of the many variables that influence the power of an ADC. After developing power relationships for the above A/D architectures, the results of this analysis will be used to estimate the power